* SCC.ASM W.F. Kilwinger  May 6, 1993 (Made in GST ASSEMBLER)
*
* Little test program for turning off/on the DTR in the SCC chip in
* the Atari Falcon030, TT and Mega STE.
*
* This is not a complete example !!
*
* The SCC in the Falcon030, TT and Mega STE is mapped on:
*
* SCC MEMORY MAP:
* ---------------
* SCC Channel A Control   $FF8C81        (all are 1 byte long)
* SCC Channel A Data      $FF8C83
* SCC Channel B Control   $FF8C85
* SCC Channel B Data      $FF8C87
*
* Note that in the TT documentation this is documented as $FF8C80 OB. 
* OB stands for Odd Byte. The TT manual assumes WORD access. I found 
* that BYTE access to $FF8C80 and $FF8C81 are mapped to the same SCC
* address, so are $82 and $83, $84 and $85, $86 and $87. But don't 
* count on that !!!
*
* SCC Channel A & Channel B are used in the following way on different
* machines:
*
* SCC Channel A: TT030 Serial 2 / LAN,
*                Mega STE Serial 2 / LAN,
*                Falcon030 LAN
*
* SCC Channel B: TT030 Modem 2
*               Mega STE Modem 2
*               Falcon030 Modem
*
*
* The SCC has 15 Write Registers and 7 Read registers. Unfortually the
* Write Registers can not be read and most of the Write Registers don't
* have a Read Register that match. WR5 is such a register, while turning
* off/on the DTR bit you can't figure out the status of the other bits.
* I used this test program to figure out which bits should be set or not
* and I think I did it right. The bits I don't set can be set by a
* programmer in his application, in that case the programmer have to take
* care for his own bits.
*
* In order to write or read to one of the registers you have to write 
* to the command register the number of the register you want to access
* and afterwards you can read or write to the register you have selected
* by accessing the command register again. (For register addressing read
* the Z8030/Z8530 Technical Manual first.)
*
* Write Register 5:
*
*       Bit 7:  0 = DTR off, 1 = DTR on
*
*   Bits/char: <=5  6  7  8
*       Bit 6:  0   1  0  1
*       Bit 5:  0   0  1  1
*
*       Bit 4: 1 = SEND BREAK
*       Bit 3: 1 = Tx ENABLE  (Must be on, otherwise chip won't send data)
*       Bit 2: non-SDLC/CRC-16
*       Bit 1: 1 = RTS on, 0 = RTS off
*       Bit 0: 1 = Tx CRC ENABLE
*
*  Good data for DTR on/off is:
*
* 8 bits/char on: $ 68        (You can figure out 8/7 bits by using
*            off: $ E8         Rsconf())
*
* 7 bits/char on: $ 28
*            off: $ A8
*
*
* Those people that want to keep track of the DCD:
*
* The Data Carrier Detect line is indicated by bit 3 of the SCC's "Read
* Register 0" of SCC channel B.
*
*        MOVE.B  #0,$FF8C85      ; SCC Channel B, Read Register 0
*        MOVE.B  $FF8C85,d1      ; read value into d1, DCD is bit #3.
*

        OPT     ABS
        SECTION TEXT

        PEA     Helptxt                         
Print   MOVE.W  #$9,-(sp)                       Printline
        TRAP    #1                              
        ADDQ.L  #6,sp    

        CLR.L   -(sp)                           
        MOVE.W  #$20,-(sp)                      Supervisor mode on
        TRAP    #1                              d0 contains * old SP
        ADDQ.W  #6,sp                           

        MOVE.B  #$05,$FFFF8C85                  Select Write Register 5
        MOVE.B  #$68,$FFFF8C85                  Clear DTR bit. See above
*                                               for meaning of $68 !!!!

        MOVE.L  D0,-(sp)                        Install old SP
        MOVE.W  #$20,-(sp)                      Supervisor mode off,
        TRAP    #1                              because we have to do a
        ADDQ.W  #6,sp                           BIOS call.

        MOVE.W  #$1,-(sp)                       Wait for key click
        TRAP    #1                              
        ADDQ.L  #2,sp  

        CLR.L   -(sp)                           
        MOVE.W  #$20,-(sp)                      Supervisor mode on
        TRAP    #1                              d0 contains * old SP
        ADDQ.W  #6,sp                           

        MOVE.B  #$05,$FFFF8C85                  Select reg 5
        MOVE.B  #$E8,$FFFF8C85                  Set DTR on again. See
*                                               above for meaning of $e8

        MOVE.L  D0,-(sp)                        Install old SP
        MOVE.W  #$20,-(sp)                      Supervisor mode off
        TRAP    #1                              
        ADDQ.W  #6,sp                           
                         
Exit    CLR.W   -(sp)                           terminate
        TRAP    #1                              

Helptxt DC.B    $0d,$0a,' Test program for SCC DTR programming',$0d,$0a
        DC.B    $0a,' DTR is off now',$0d,$0a
        DC.B    ' Press any key to turn it on again',$0d,$0a,$00

        END
